The MRD532AQFN-L is a CMOS integrated circuit for the purpose of recovering F2F encoded data received from a magnetic head. The built-in memory buffers allow external device to read the decoded data with more flexible speed. Its flexible interface design provides the options for 2-wire or 3-wire serial communication
Features
Integrated amplification circuit for magnetic head signal.
QFN 24 pin package (Quad Flat No-lead): small footprint on PCB, only 4mm*4mm
Bi-directional data transfer protocol
Triple track and support for 75/210bpi recording density.
Magnetic head data input frequency range from 300 bit/sec to 12600 bit/sec.
Provide the option of 8 or 11 leading bits ignored
Enhanced noise filter
Automatic offset voltage cancellation circuit for amplifiers
Advanced algorithm to effectively read poor condition cards as well as high jitter cards
Description