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MRD531(SOP)

Lead Free CMOS Frequency/Double Frequency (F2F) Decoder Chip

The MRD531B is a Lead Free CMOS integrated circuit for the purpose of recovering F2F encoded data received from a magnetic head. It is commonly used in Point-of-Sales (POS) and electronic money transfer terminals. It is capable of one, two or three track magnetic stripe readings. It comes as a 28-pin Small Outline Package (SOP). The MRD531B accepts magnetic head data input frequency from 300 to 12600 bit/sec and uses advanced algorithm to effectively read poor condition cards as well as high jitter cards. It fully conforms to ISO7811 standard.


Overview

Features & Benefits

The MRD531B is a Lead free CMOS integrated circuit for the purpose of recovering F2F encoded data received from a magnetic head.

  • Triple track F2F decoder chip
  • Support 3.3V~5.0V working environment
  • Enhanced noise filter
  • SOP 28 PIN
  • Integrated Amplification Circuit for magnetic head signal
  • Both output polarities supportede
  • Adjustable read data output clock pulse width
  • Triple channel and support for 75/210bpi recording density
  • Magnetic head data input frequency range from 300 bit/sec to 12600 bit/sec
  • Power-down stand-by mode to reduce current consumption
  • 11 leading bits ignored
  • Enhanced noise filter
  • Automatic offset voltage cancellation circuit for amplifiers
  • Advanced algorithm to effectively read poor condition cards as   well as high jitter cards

Specifications

Certifications

Applications

Banking
Gaming
Vending
Hospitality
Petroleum
Parking
Retail
Transportation
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